BIT ERROR RATE MEASURING SIGNAL PROCESSING CIRCUIT FOR DIGITAL MULTIPLEX RADIO SYSTEM,申请号JP19920142694-传众专利搜索

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发明名称	BIT ERROR RATE MEASURING SIGNAL PROCESSING CIRCUIT FOR DIGITAL MULTIPLEX RADIO SYSTEM
摘要
申请公布号	JPH05336078(A)	申请公布日期	1993.12.17
申请号	JP19920142694	申请日期	1992.06.03
申请人	FUJITSU LTD;NIPPON TELEGR & TELEPH CORP <NTT>	发明人	AONO YOSHITAMI;TAKIZAWA TOSHIYUKI;IWAMATSU TAKANORI;KOBAYASHI KENZO;AIKAWA SATOSHI
分类号	H04L1/00;H04L27/00;(IPC1-7):H04L1/00	主分类号	H04L1/00
代理机构		代理人
主权项
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