| 摘要 |
PURPOSE:To shorten the multiplying operation time of a polynomial by providing a recording circuit which converts the multiplier of the multiplication result expressed with a binary to an expression for multiplication. CONSTITUTION:The multiplier consists of a recoding circuit 1 of the multiplier, a partial product generating and adding circuit 2, a register 10 where a multiplicand is held, an adder 3, multiplexers 4 and 5, and registers 11 and 12. The multiplicand from a signal line 21 is held in the register 10 and is inputted to the circuit 2. The multiplier from a signal line 22 is selected by the multiplexer 4 and is inputted to the circuit 1 through the register 11, and the binary expression is converted to an expression (-2, -1, 0, 1, 2) for multiplication, and this multiplier is inputted to the circuit 2. The circuit 2 multiplies the multiplicand from the register 10 and the recorded multiplier from the circuit and inputs the partial products to multiplexers 4 and 5 through lines 31 and 32. |
