| 摘要 |
PURPOSE:To increase resistance to soft error, and reduce delay of writing time, by arranging a switching transistor between a first or a second gate electrode and a capacitor. CONSTITUTION:A switching transistor Q10 constituted of a P-channel thin film transistor is connected with the gate of a driving transistor Q1 and a cross coupling capacitor C1. The switching transistor Q10 is turned into the ON state when a word line 2 is in the inactive state (a memory cell is in the data holding state), and controls the state in the manner in which the gates of driving transistors Q1, Q3 are connected via the cross coupling capacitor C1. The switching transistor Q10 is turned into the OFF state when the word line is in the active state (the memory cell is in the data writing state), and controls the state in the manner in which the existance of the cross coupling capacitor C1 can be neglected. As the result, the potential of a storage node n1 or n2 of a static RAM 10 is not decreased from 3.3V to a value lower than or equal to 0.0V. |
