| 摘要 |
The IC memory cell having capacitor at the 3 sidewall is prepared by removing isolating area of 1st isolating film on a substrate, forming trench thereon, forming 2nd isolating film and photoresist in order on all area, removing the two films except 2nd isolating film at the trench, removing 1st isolating film of trench margin, forming n+ impurity film with using 1st isolating film as a mask, removing 1st isolating film, forming 3rd film at the same place, forming polycrystalline silicon, patterning for plate and gate electrodes, implanting n+ impurity on a P-type substrate, forming 4th, 5th isolating films on all area, patterning, forming a bitline contact hole on the n+ impurity drain.
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