| 摘要 |
<p>PURPOSE:To reduce the hardware quantity of an image processing system and to promote its cost reduction by decreasing the number of delay circuits required for the block image conversion processing of an image processor which performs image encoding and simplifying its control logic. CONSTITUTION:A block image conversion part consists principally of an image compression memory GCM 1 which sequentially generate a 4X4 matrix of four pixel data P11-P14,-P41-P44 corresponding to, for example, four lines according to pixel data inputted, one by one, in series while (n) pixel data constitute on line and outputs the pixel data P11-P41,-P14-P44, constituting the respective columns of the matrix as units in series, or an image expanding memory which performs reverse conversion processing.</p> |
