发明名称 TIMER CIRCUIT
摘要 <p>PURPOSE:To prevent the accuracy from being deteriorated by implementing the count operation of a timer section and the read operation of a control section asynchronously. CONSTITUTION:A control section 2 is operated synchronously with a system clock CP and a timer section 1 counts a count clock CLK having a period of twice the period of the system clock CP or over. The circuit is provided with flip-flop circuits FF1, FF2, FF3 and an output COUT of the timer section 1 is fetched in a read register PREG 5 at a leading edge of the system clock CP. Since the control section 2 reads a content ROUT of the read register PREG 5 the control section 2 reads the same value as the content of the timer section or a value less than the content by one.</p>
申请公布号 JPH05291916(A) 申请公布日期 1993.11.05
申请号 JP19920092722 申请日期 1992.04.13
申请人 YOKOGAWA ELECTRIC CORP 发明人 SANO NAOKI
分类号 G06F1/14;H03K17/28;(IPC1-7):H03K17/28 主分类号 G06F1/14
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