| 摘要 |
<p>PURPOSE:To establish frame synchronization without adding any specified bit for frame synchronization to an interleaved received signal after performing error correcting coding while using a block code. CONSTITUTION:When frame synchronization is not established, namely, when no timing signal Pt is received from a timing signal generation part 51, an exclusive OR part 31 of a frame synchronizing circuit 3 extracts N ways of continuous N bits from a received signal S2, respectively calculates exclusive OR for N bits and outputs the result as the N sequences of data signal sequences. The N pieces of word synchronizing parts 41-4N respectively receive the N sequences of data signal sequences from the exclusive OR part and respectively transmit word pulse signals when word synchronization is established. The timing signal generation part 51 generates the timing signal Pt by receiving the word pulse signals respectively from the N pieces of word synchronizing parts.</p> |
