发明名称 THRESHOLD ADJUSTMENT IN VERTICAL DMOS DEVICES
摘要 <p>A process for fabricating a p-channel VDMOS transistor (1) includes a high temperature, long diffusion subsequent to deposition of the polysilicon gate (60) for forming body regions (82). The threshold voltage of the VDMOS devices is adjusted subsequent to both gate formation and the high temperature, long duration body diffusion by implanting a suitable p-type dopant (94) into the VDMOS channel (88) through the insulated gate (50) after formation thereof. Since the gate is formed prior to threshold adjust, high temperature processing and long duration diffusions requiring the presence of the gate may be completed prior to threshold adjust, without risk to the adjusted device threshold.</p>
申请公布号 WO1993019482(A1) 申请公布日期 1993.09.30
申请号 US1993002256 申请日期 1993.03.19
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