发明名称 VERFAHREN ZUM VERLOETEN VON LEITERPLATTEN UNTER NIEDERDRUCK
摘要 The invention relates to a process for soldering printed circuit boards or the like fitted with components, especially without flux, in which the soldering process and any preceding, intermediate or following steps take place under low pressure and under the plasma effect of a special process gas atmosphere.
申请公布号 DE4225378(A1) 申请公布日期 1993.09.23
申请号 DE19924225378 申请日期 1992.07.31
申请人 LINDE AG, 65189 WIESBADEN, DE 发明人 WANDKE, ERNST, DR.-ING., 8192 GERETSRIED, DE
分类号 B23K1/00;B23K1/012;B23K1/08;H05K3/34 主分类号 B23K1/00
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