发明名称 DETECTION CIRCUIT FOR CLOCK FAULT
摘要 <p>PURPOSE:To provide the clock error detection circuit detecting a frequency fault, duty fault or a fault of an input level with respect to the clock error detection circuit used for a transmitter or the like. CONSTITUTION:The circuit is provided with an edge detection section 100 receiving one of branched clock signal signals, detecting a leading edge of a clock pulse and outputting a prescribed signal, a window pulse generating section 200 receiving the other clock signal branched and outputting a prescribed signal at a point of time when the leading part of the clock pulse to be in existence and a frequency error discrimination section 400 discriminating the presence of an error in the clock frequency from an output of the edge detection section 100 and an output of the window pulse generating section 200.</p>
申请公布号 JPH05235918(A) 申请公布日期 1993.09.10
申请号 JP19920038298 申请日期 1992.02.26
申请人 FUJITSU LTD 发明人 NARAHIRA SADAO;NANBA KENSABURO;HANAEDA KAZUNORI;NISHINE KOSUKE
分类号 H04L7/00;(IPC1-7):H04L7/00 主分类号 H04L7/00
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