发明名称 |
METHOD FOR FABRICATING MOS TRANSISTOR WITH THE VERTICAL GATE |
摘要 |
The method for improving the step coverage of the metal thin film comprises steps: (a) forming a conductive line by injecting ion; (b) forming a source and drain regions by forming an oxide layer and injecting ion; (c) depositing LTO and patterning it to define common source and drain regions; (d) forming a 1st epitaxial and a gate oxide layers on the regions; (d) forming a side wall gate electrode after depositing and etching back a polysilicon; (e) forming a silicide layer on the side wall of the gate electrode; (f) forming a 2nd epitaxial layer and defining common source and drain regions on it; (g) depositing and patterning the LTO; and (h) forming polysilicon, dielectric and polysilicon layers in sequence and patterning them.
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申请公布号 |
KR930008582(B1) |
申请公布日期 |
1993.09.09 |
申请号 |
KR19900016280 |
申请日期 |
1990.10.13 |
申请人 |
GOLDSTAR ELECTRON CO., LTD. |
发明人 |
HAN, JONG - SU |
分类号 |
H01L27/108;(IPC1-7):H01L27/108 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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