| 摘要 |
PURPOSE:To quickly and with high accuracy detect abnormality of various timing signals in an electronic exchange, by a simple constitution. CONSTITUTION:Input/output clock signals CK1, CK2 of a PLL circuit 2 are counted by counters 13 and 11, based on a frame signal SF as a reference, respectively, each count result is decoded by decoders 14 and 12, respectively, and thereafter, compared by the timing of a test clock signal CKT (15, 16). An obtained comparison result S1 shows mainly normality or abnormality of the clock signal CK2. Also, the clock signal CK1 is counted by a counter 17, based on the frame signal SF as a reference, and its count result is decoded by a decoder 18, and thereafter, compared with the frame signal SF (19). An obtained comparison result S2 shows normality or abnormality of the frame signal CK2. |
