Vertical lead-on-chip package

摘要

A vertical lead-on-chip package and the method of making defines a high density array of semiconductor devices with leads extending from and across one face of the device, to the edge of the device such that a plurality of devices are vertically mounted on a circuit board. Each device has a heat sink thereon which is held in a fixture which serves as an array heat sink during testing and burn-in and during mounting and operation of the devices on the circuit board.