发明名称 |
REFRESHING CONTROL CIRCUIT |
摘要 |
<p>PURPOSE:To realize a refreshing control circuit in circuit construction capable of easy LSI. CONSTITUTION:Predicted image data and '0' block data are selectively selected and outputted by a selector part 11, and the selector part 11 receives the number of counted blocks from a single screen block counter part 13 with its decoder part 12 and each time the received counted number coincides with a decoded value, outputs '0' block data. Then a shifting control counter part 14 gives the counter part 13 a load value which controls the single screen block counter 13 to shift the number of counted blocks by one each time one screen is updated.</p> |
申请公布号 |
JPH05183895(A) |
申请公布日期 |
1993.07.23 |
申请号 |
JP19910346429 |
申请日期 |
1991.12.27 |
申请人 |
FUJITSU LTD |
发明人 |
IWAMA MASAYASU;FUKUI HIROKAZU;ITO AKIRA;MIYAKE HIROSHI;SAKAI KIYOSHI |
分类号 |
H04N1/41;G06T1/20;G06T9/00;H04N19/102;H04N19/107;H04N19/174;H04N19/196;H04N19/42;H04N19/50;H04N19/503;H04N19/65;H04N19/67 |
主分类号 |
H04N1/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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