发明名称 |
HIGH DEFINITION TELEVISION SIGNAL PROCESSING CIRCUIT |
摘要 |
PURPOSE:To prevent synchronization from being unlocked early even when the reception state is deteriorated by providing a MUSE-HD signal detection circuit to the processing circuit so as to unlock the synchronization early even when another input signal is selected thereby detecting a new frame pulse(FP). CONSTITUTION:A MUSE-HD signal detection circuit 9 detects an HD signal changing by a horizontal rate and detects whether or not the signal differs from a MUSE signal synchronized at present and outputs its resulting detection signal. A FP reset circuit 7 does not increment a reset counter when the circuit 9 detects it that the input signal is not changed and increments the reset counter when the circuit 7 detects it that the input signal is unchanged. When the counter is incremented by a prescribed number of times, the FP signal is outputted and an internal counter is reset by the FP signal detected from a succeeding FP detection circuit. Thus, even when another input signal is selected, the synchronization is quickly unlocked to detect a new FP signal and even when the reception state is wrong, it is prevented that the synchronization is quickly unlocked. |
申请公布号 |
JPH05176196(A) |
申请公布日期 |
1993.07.13 |
申请号 |
JP19910342679 |
申请日期 |
1991.12.25 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
MIYOSHI TOSHIHIRO;KIKUCHI YOSHINOBU;KOGA TOYOKATSU |
分类号 |
H04N5/10;H04N7/00;H04N7/015;H04N7/12 |
主分类号 |
H04N5/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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