| 摘要 |
PCT No. PCT/JP91/00125 Sec. 371 Date Sep. 30, 1991 Sec. 102(e) Date Sep. 30, 1991 PCT Filed Feb. 1, 1991 PCT Pub. No. WO91/11728 PCT Pub. Date Aug. 8, 1991.An IC testing device in which the timing for sending out test signals and the timings for acquisition of IC output response signals can be adjusted in accordance with delay times (T1 to Tn) in transmission lines (L1 to Ln) of an IC connection board (81) to which terminals (P1 to Pn) of an IC under test (1) are connected. A nonvolatile storage (83) is provided on the IC connection board (81) and data on the delay times (T1 to Tn) in the transmission lines (L1 to Ln) are prestored in the storage. Even if the IC connection board (81) is replaced with another one, the tester main body of the testing device needs only to read out the data from the storage (83) at the start of testing the IC and to adjust the send-out timing and the acquisition timing, based on the read-out data. Thus, the testing time can be reduced. Also, there in no need to identify the individual IC connection boards (81 ).
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