摘要 |
The circuit generates one shot pulse having a constant pulse using falling edge of trigger pulse. The circuit comprises a rising edge detector (11) for generating rising edge signal the at rising edge of trigger pulse, a pulse width controller (12) including a flip-flop for applying chip disable signal and chip selection disable signal to a counter (CNT11) and a flip-flop (F4) according to the rising edge detection signal transmitted from the trigger rising edge detector (11), and a flip-flop (Q4) for applying chip disable signal to the flip-flop (Q3) and for generating pulse width control signal, and an output flip-flop (13) for generating one shot pulse according to rising edge detection signal and pulse width control signal. |