| 摘要 |
PURPOSE:To shorten the execution time of correctness test by checking all the faults of an error detection circuit based on hardware mechanism. CONSTITUTION:In registers 101 to 104, the diagnostic data detecting errors by all the error detection circuits in the LSI are set using a scan pass. With 1 clock, when no fault is in the error detection circuit and the output of all the error detection circuit in the LSI include errors, the logic to be '1' becomes '1' and a detection circuit 110 detects all the output is '1'. However, for example, an error detection circuit 106 includes a fault and the output becomes '0' due to no error detection in spite of an erroneous data input. Therefore, the output of the detection circuit 110 checking all the error detection circuits 105 to 108 in a batch s written in a flip-flop(FF)112, and the diagnostic device reads the FF 112 to discriminate the presence or absence of a fault. |
