发明名称 Memory arrays with a memory cell adjacent to a smaller size of a pillar having a greater channel length than a memory cell adjacent to a larger size of the pillar and methods
摘要 The disclosure is related to memory arrays and methods. One such memory array has a substantially vertical pillar. A memory cell adjacent to the pillar where the pillar has a first size has a greater channel length than a memory cell adjacent to the pillar where the pillar has a second size larger than the first size.
申请公布号 US9391082(B2) 申请公布日期 2016.07.12
申请号 US201514710976 申请日期 2015.05.13
申请人 Micron Technology, Inc. 发明人 Sakui Koji;Feeley Peter
分类号 H01L27/115;G11C16/04;H01L29/788;H01L29/792;H01L29/66 主分类号 H01L27/115
代理机构 Dicke, Billig & Czaja, PLLC 代理人 Dicke, Billig & Czaja, PLLC
主权项 1. A method of forming a memory array, comprising: forming a plurality of control gates; forming a plurality of first dielectrics, wherein the control gates and the first dielectrics alternate so that one of the plurality of first dielectrics is interposed between successively adjacent ones of the plurality of control gates; forming a plurality of blocking dielectrics so that a blocking dielectric is adjacent to each of the plurality of control gates; forming a plurality of charge-storage structures so that a charge-storage structure is adjacent to each of the plurality of blocking dielectrics; forming a plurality of tunnel dielectrics so that a tunnel dielectric is adjacent to each of the plurality of charge-storage structures; forming a substantially vertical pillar adjacent to the plurality of tunnel dielectrics; wherein each memory cell of a portion of a series-coupled string of memory cells comprises one of the control gates, one of the blocking dielectrics, one of the charge-storage structures, and one of the tunnel dielectrics; wherein one of the plurality of first dielectrics is further interposed between successively adjacent ones of the plurality of plurality of blocking dielectrics, between successively adjacent ones of the plurality of charge-storage structures, and between successively adjacent ones of the plurality of tunnel dielectrics; and wherein a memory cell of the series-coupled string where the pillar has a first size has a greater thickness than a memory cell of the series-coupled string where the pillar has a second size larger than the first size.
地址 Boise ID US