| 摘要 |
PURPOSE:To obtain a static random access memory capable of detecting whether short circuit between bit lines connected with memory cells in each row exists, without necessitating an operation test. CONSTITUTION:A detection mode signal generating part 1 generates a detection mode signal TST showing whether a short circuit state between bit lines B0, B0#, B1, B1#, B2, B2#, B3, B3# is detected in a non-operation period. Detection control circuits L0, L1, L2, L3,..., T0, T1, IN1, IN2 turn off pull-up transistos PT0, PT1, PT2,..., turn on columun transfer gates CT0, CT1, CT2, CT3,<, and apply a specified potential difference to data line pair D, D#. |
