发明名称 Memory controller and data processing system.
摘要 <p>A memory controller 18 of a data processing system controls access to a memory having a plurality of memory banks of memory units. The banks operate in either an interleave or non-interleave access operation. The controller has map forming means 42A and 42B to map the memory units arranged in first and second predetermined orders, the second map beng in reverse order relative to the first map. Memory unit selection means 44A and 44B select which of the memory units in each of the maps an address from a cpu or a DMA controller is assigned to and control means 46 generates the physical location address in interleave or non-interleave operation in accordance with the selected unit being assigned to different banks or the same bank. &lt;IMAGE&gt;</p>
申请公布号 EP0540198(A1) 申请公布日期 1993.05.05
申请号 EP19920309177 申请日期 1992.10.08
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 FUJITA, NORIO;GOHDA, MITSUHIRO, PACIFIC PALANCE MINAMI-RINKAN
分类号 G06F12/06 主分类号 G06F12/06
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