| 摘要 |
The circuit arbitrates a dual port memory so that two processors hold in common a dual port memory. The circuit comprises: an access selection recognition section (100) for providing the address production status signal to a multiplexer in response to the host enable signal and the local chip selection signal; a local waiting control section (200), controlled by the access selection recognition section, for providing the local waiting signal to the local processor when the local chip selection signal is active; and a host waiting section (300) for providing the host waiting signal to the host processor when the host enable signal is active. The circuit interfaces data between the host processor and the local processor, and prevents collision and corruption of data.
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