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发明名称
TEST CIRCUIT FOR RAM WITH GATE ARRAY
摘要
申请公布号
JPH0599989(A)
申请公布日期
1993.04.23
申请号
JP19910259101
申请日期
1991.10.07
申请人
NEC CORP;NEC ENG LTD
发明人
SAKAINO HIROBUMI;KAWANO YOSHIHIKO
分类号
G01R31/28;G11C29/00;G11C29/56
主分类号
G01R31/28
代理机构
代理人
主权项
地址
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