ADDRESS FORMATION MECHANISM AND METHOD OF PREVIOUSLY FETCHING DATA

摘要

PURPOSE: To exactly determine a pre-taking-out line for a loop consisting of a combination of stride of 1, stride of N or stride values by providing a stride register for assisting pre-taking-out. CONSTITUTION: A CPU 10 includes a cache memory device 18, an instruction decoder 20 and an address forming block 22. The stride register 30 is loaded in response with decoding of a fresh instruction within the instruction decoder 20. The value thereof is the stride value related to the storage reference to be executed by using a corresponding general-purpose register 26 as an index register. The stride value obtd. in such a manner and the data storage reference address formed by an adder 28 are added by an adder 32 to obtain the priori fetching data. In case where the stride register value is not zero, the data is pre-taken out to the cache memory device 18 from the main memory device 14 unless the data exists in the cache memory device 18.