| 摘要 |
A sequential access memory is used as a data delaying device in a digital circuit. The sequential access memory is provided with a storage portion which is capable of storing the data of (m x 2 + ?) words, and a counter which is an (m x 2 + ? x 2) base returns to the (m + 1) address after having addressed up to (m x 2 + ?) address sequentially from the No. 1 address of the storage portion, and addresses the No. 1 address again after having addressed up to the (m + ?) address sequentially beginning from the (m + 1) address so as to repeat the same counting operation. Therefore, the data of two systems of the a portion composed of the m words and the b portion composed of the ? words may be outputted at a predetermined timing by a simplified, inexpensive circuit, which requires no output switching device. |
