发明名称 ANORDNUNG FUER DIE DETEKTION DES LOGISCHEN ZUSTANDES EINES BAUTEILES, DESSEN IMPEDANZ SICH IN ABHAENGIGKEIT VON SEINEN ZUSTAND AENDERT.
摘要 The invention relates to a device for detecting the logic state of a component whose impedance varies according to this state comprising means (J1, R1) of generating a current and a voltage for measurement so that detection takes place with a constant current consumption regardless of the state of the component, the device further comprising measurement means (J2, R2, AD) ensuring detection of the logic state of the component (CEL). Applications to read memories whose impedance varies according to the logic state of the cells. <IMAGE>
申请公布号 DE500461(T1) 申请公布日期 1993.02.04
申请号 DE19920400440T 申请日期 1992.02.19
申请人 SGS-THOMSON MICROELECTRONICS S.A., GENTILLY, FR 发明人 LISART, MATHIEU, F-13100 AIX EN PROVENCE, FR;FOURNEL, RICHARD, F-13530 TRETS, FR
分类号 G01D5/16;G01D5/18;G06F1/00;G06F21/00;G11C16/28;(IPC1-7):G01D5/18 主分类号 G01D5/16
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