发明名称 |
DISCHARGING TYPE PANEL DRIVING METHOD |
摘要 |
PURPOSE:To use a driving circuit which reduces the power consumption of an anode-side capacitive load and has low breakdown strength by setting a cathode voltage below an anode voltage at the time of an erasing level. CONSTITUTION:When a discharge type panel which performs discharge light emission by applying the cathode voltage and anode voltage to each display cell of the discharging type panel where plural display cells are arrayed in a matrix is put in memory driving, the cathode voltage is set lower than the anode voltage at then time of the erasing level. In this case, 0<¦VE¦<0.8¦VM is preferable, where VE is the cathode erasing voltage level of the cathode voltage and VM is the DC maintaining voltage of the display cells. Consequently, the potential difference between the anode and cathode is reduced, thereby causing no erroneous discharge.
|
申请公布号 |
JPH0519717(A) |
申请公布日期 |
1993.01.29 |
申请号 |
JP19910176903 |
申请日期 |
1991.07.17 |
申请人 |
NIPPON HOSO KYOKAI <NHK>;OKI ELECTRIC IND CO LTD |
发明人 |
SAKAI TETSUO;TAKANO YOSHIMICHI;FUJII KOZO;SAWAI HIDEO;KOMATSU TAKASHI |
分类号 |
G09G3/282;G09G3/20;G09G3/28;G09G3/291;H01J11/00;H01J11/24;H01J17/00 |
主分类号 |
G09G3/282 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|