发明名称 Arithmetic circuit for addition, subtraction, multiplication and division - uses single up=down counter in place of two counters in shift-register decimal point controller
摘要 The arithmetic circuit is arranged as in P4115226.3. A special circuit (75) is used which only has a single up/down counter instead of two up-counters. The special circuit is pref. the circuit according to P4120742.4. The arithmetic circuit includes a main circuit and an auxiliary shift register with a main controller and combined decimal point and shift register controller (60).
申请公布号 DE4121731(A1) 申请公布日期 1993.01.28
申请号 DE19914121731 申请日期 1991.07.01
申请人 MERKLE, PAUL, 7032 SINDELFINGEN, DE 发明人 MERKLE, PAUL, 7032 SINDELFINGEN, DE
分类号 G06F7/491;G06F7/52 主分类号 G06F7/491
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