发明名称 MULTIPLYING DEVICE
摘要 PURPOSE:To prevent the chattering component of an input signal from appearing in an output signal in a multiplying device which obtains the output signal having two-fold frequency of the input signal. CONSTITUTION:The output of an EXOR(exclusive OR circuit) 4 which takes the input signal as one input is inputted to the clock input of a D-FF 1. The data input of the D-FF 1 is fixed to the high level. The output of the D-FF 1 is delayed in a delay device 2 by a time T1. The D-FF 1 and the delay device 2 are reset by the output of the delay device 2, and the output of a T-FF 3 is inverted. The output of the T-FF 3 is inputted to the other input of the EXOR 4. The delay time T1 of the delay device 2 is made longer than the duration of chattering of the input signal to obtain the multiplication output free from chattering from the D-FF 1.
申请公布号 JPH04347923(A) 申请公布日期 1992.12.03
申请号 JP19910003884 申请日期 1991.01.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NISHIKAWA KAZUHIKO
分类号 H03K5/00;H03K5/01;H03K5/1254 主分类号 H03K5/00
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