发明名称 METHOD AND ARRANGEMENT FOR BIT SYNCHRONIZATION IN A RECEIVER FOR DIGITAL DATA TRANSMISSION
摘要 Method and apparatus for bit synchronization in a receiver for digital data transmission in which the received short-length packets of bit pulses are first converted into normalized 1 or 0 samples at the rate nFb, where Fb is the bit rate and n a small even integer. For each packet or sub-packet of M bits, the following steps are performed: a) storing the normalized samples according to a sequence matrix [B] having (n+1) row-sequences B1, . . . , BA+1 and M columns; b) determining and storing a transition column matrix [T] having n rows obtained by adding modulo-2 pairs of adjacent sequences B1, . . . , Bn+1; c) calculating two barycentre numbers m1 and m2 for the upper and lower half of the matrix [T]; d) calculating a barycentre number m of matrix [T] derived from numbers m1 and m2 and matrix [T] or matrix [T] robated cyclically by half the number of rows (n/2), depending on whether m2-m1 is smaller than n/2 or not. e, f) calculating an integer j=(m'-n/2) modulo-n, where m' is the nearest integer to number m; g) choosing the sequence Bj as the optimum sequence representative of the M-bit (sub)-packet in question.
申请公布号 US5163071(A) 申请公布日期 1992.11.10
申请号 US19900483495 申请日期 1990.02.20
申请人 U.S. PHILIPS CORPORATION 发明人 GELIN, BENOIT
分类号 H04L7/02;H04L7/033 主分类号 H04L7/02
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