| 摘要 |
<p>PURPOSE:To make a connection and disconnection at each intersection freely, by providing flip-flop and gate circuits at intersections of input signal lines and output signal lines. CONSTITUTION:At respective intersections of input signal lines 100 and 200, and output signal lines 10 and 20, flip-flop 110, 120, 210, and 220, and AND circuits 11, 12, 21, and 22 are provided and controlled by outputs of shift buses 115, 125, 215, and 225. If one flip-flop stores ''0'', the output of the AND circuit connected to it is fixed at ''0''. For writing into the flip-flops, write data is supplied to the 1st flip-flop via the shift bus in series and clock pulses are supplied to clock signal line 50 as many as the flip-flops.</p> |
