| 摘要 |
PURPOSE:To obtain a semiconductor device which is more enhanced in scale of integration by a melthod wherein a data memory transistor of a TFT is provided onto a gate electrode in parallel with another data memory transistor provided inside a semiconductor substrate. CONSTITUTION:A gate electrode 10 is pattered. Then, an N<+> diffusion layer 24 is formed for a gate electrode 10 and an islating oxide film 23. Thereafter, a second gate insulating film 18 is provided, the second gate insulating film 18 where a contact hole is bored in a source region and a drain region is removed to enable the surface of a semiconductor substrate 17 to be exposed. Then, a polysilicon film 19 is deposited and patterned. Thereafter, a flattening film 20 is formed, and impurity ions are implanted. If the flattening film 20 is dissued in an after process, it is removed. In this state, impurities of the same conductivity type as the source and the drain region are introduced into the required part of a TFT channel 22 to constitute a depression transistor. |
