发明名称 FORMATION METHOD OF GROOVE-BURIED INTERCONNECTION
摘要 PURPOSE:To eliminate a need for a dry etching operation which is used to obtain a flat-structure Cu interconnection inside a groove and whose control is difficult by a method wherein a first electrode material is left only on the bottom face of the groove and a second electrode material is piled up on the first electrode material in the groove. CONSTITUTION:An open groove 16 for interconnection use is formed in a CVD- SiO2 film 14 in such a way that its cross section is a rectangular shape having vertical stepped parts. Then, overhang parts 17 are formed between it and a photoresist 15. A Ti film 18 and a Pt film 19 are applied continuously by an electron-beam vapor-deposition operation. Then, the photoresist 15 remaining on the CVD-SiO2 film 14 is dissolved a Pt/Ti interconnection 20 is formed only on the bottom part inside the open groove 16 for interconnection use. Then, only the Pt/Ti interconnection 20 is plated selectively with Cu in an electroless manner. Then, the open groove 16 for interconnection use in the CVD-SiO2 film 14 is filled with a Cu selectively grown layer 21. Thereby, a Cu/Pt/Ti laminated electrode is formed inside the groove 16 for interconnection use.
申请公布号 JPH04290232(A) 申请公布日期 1992.10.14
申请号 JP19910052973 申请日期 1991.03.19
申请人 TOSHIBA CORP 发明人 AOYAMA MASAHARU;ABE MASAYASU
分类号 H01L21/3205;H01L21/288;H01L21/74;H01L21/768;H01L23/52 主分类号 H01L21/3205
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