| 摘要 |
PURPOSE:To realize the PLL circuit controlling a frequency of an output signal stably with noise and phase fluctuation in a reference signal. CONSTITUTION:The PLL circuit comprising a phase comparator 2, a VCO circuit 3, and a 1st frequency divider 5 is provided with a 2nd frequency divider 7 frequency-dividing an output signal in a same rate as the 1st frequency divider, a comparator 6 comparing counts of the 1st and 2nd frequency dividers 5,7 to output a signal, a latch circuit 8 latching the signal from the comparator 6 with an output of the 1st frequency divider 5, a 1st gate circuit 9 controlling a reference signal 1 to be inputted to a reset terminal of the 1st frequency divider 5 by an output of the latch circuit 8 and a 2nd gate circuit 10 controlling the input of the reference signal 1 to the phase comparator 2 by an output of the comparator 6. |
