发明名称 |
Programmable delay line integrated circuit having programmable resistor circuit |
摘要 |
A programmable delay line with digital input to a two-part digital-to-analog converter structure to define an equivalent resistance at a pull-down node. Preferred embodiments are configured as two identical halves. The outputs of the two halves are combined to produce an exactly symmetrical waveform. This is particularly advantageous in a programmable delay line, since this architecture assures that control changes which change the delay will not also introduce asymmetry into the output waveform.
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申请公布号 |
US5144173(A) |
申请公布日期 |
1992.09.01 |
申请号 |
US19910742571 |
申请日期 |
1991.08.07 |
申请人 |
DALLAS SEMICONDUCTOR CORPORATION |
发明人 |
HUI, TITKWAN |
分类号 |
H03K5/00;H03K5/13;H03K17/693 |
主分类号 |
H03K5/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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