发明名称
摘要 PURPOSE:To contrive accomplished of high efficiency for the titled semiconductor device by a method wherein an I<2>L gate is surrounded using at least one each of dielectric and, at the same time, a second conductive type high density impurity region is formed below said dielectric, thereby enabling to inject an injector current to each gate of the I<2>L, which coexists with a linear circuit, respectively. CONSTITUTION:Following a selective oxidization method, an oxide film of 1- 1.5mum in thickness is formed on an I<2>L gate isolation region. Then, P type impurities are selectively diffused and the base region of an NPN transistor, which performs the function as an emitter region for a injector region 26 and a PNP transistor, is formed. At the same time, a P type base region is formed on the region where a linear circuit will be formed, N type impurities are selectively diffused, and collector regions 281 and 282 for the NPN transistor are formed in the base region 27. Subsequently, after an Al film has been vapor-deposited on the whole surface, an injector electrode 31, a base electrode 32 and collector electrodes 331 and 332 are formed by performing a patterning and, at the same time, each electrode for the linear circuit is also formed.
申请公布号 JPH0454983(B2) 申请公布日期 1992.09.01
申请号 JP19820168829 申请日期 1982.09.28
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 KANZAKI KOICHI
分类号 H01L21/76;H01L21/74;H01L21/8226;H01L27/02;H01L27/082 主分类号 H01L21/76
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