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经营范围
发明名称
VERIFYING METHOD FOR LAYOUT PATTERN OF LOGICAL CIRCUIT
摘要
申请公布号
JPH04237143(A)
申请公布日期
1992.08.25
申请号
JP19910022937
申请日期
1991.01.22
申请人
ROHM CO LTD
发明人
FUJIKI KOICHI;MORIKAWA MASATO
分类号
H01L21/66;G06F17/50
主分类号
H01L21/66
代理机构
代理人
主权项
地址
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