发明名称 Method of forming planar vacuum microelectronic devices with self aligned anode.
摘要 <p>The present invention is directed to a method for forming planar microelectronic devices, with the devices including elements made from the same or from different materials, and with the devices capable of being fabricated with gaps between elements of sub-submicron dimensions with an exceptional control. On a substrate (10) there is a deposited conductive layer (14) and a second material (16). The second material is patterned, and it and the conductive material are etched to form the first element and the first element cap, respectively. Next, a layer of sacrificial material of predetermined thickness is deposited on top of the structure. It is the thickness of this sacrificial layer, rather than any patterning or etching, that determines how big the gap will be between elements. More particularly, the sacrificial material is deposited using a conformal deposition. In this manner, there are formed vertical walls of sacrificial material alongside the vertical walls of the first element and its cap, with the sacrificial material walls having a lateral thickness equal to the thickness of the deposited sacrificial material. Next, a second conductive layer is deposited using a conformal deposition. In this manner, there are formed vertical walls of second conductive material alongside the vertical walls of the sacrificial material, on the opposite side of these walls from the vertical walls of the first element and its cap. Similar to the sacrificial material walls, the second conductive material walls have a vertical thickness that depends on the height of the first element an its cap. The cap thickness is chosen such that the second conductive material walls have a height greater than the deposition thickness of the second conductive material. In this manner, when next the second element material is anisotropically etched to an extent sufficient to remove the second conductive material from most of the structure, some portion of the second conductive material walls will remain to form the second element. Finally, the sacrificial material is anisotropically etched, thereby removing the sacrificial material walls between the first element and the second element. &lt;IMAGE&gt;</p>
申请公布号 EP0495227(A1) 申请公布日期 1992.07.22
申请号 EP19910121820 申请日期 1991.12.19
申请人 XEROX CORPORATION 发明人 BOL, IGOR I.
分类号 H01L49/02;H01J9/02;H01J21/10 主分类号 H01L49/02
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