| 摘要 |
PURPOSE:To attain a high speed in access time by providing a potential detector to detect the position of a data line and an amplifier which is controlled by the output of the potential detector. CONSTITUTION:The data line 1 is precharged by a field-effect transistor (MOS)2 which is controlled by a control signal 1 and enters a logic 'H' state. Then, the control signal 1 enters a logic 'L' state, and after the MOS 2 is OFF, when the control signal 2 from a column decoder is changed to the logic 'H', a column selective transistor MOS 4 enters an ON state; and the data line 1 starts changing to a logic 'L' by DATAO. At this time, the potential detector 5 quickly detects the change of the data line 1 to the logic 'L', outputs the control signal 3, and activate the amplifier 6. And, when the amplifier 6 is activated, the data line 1 through such activation changes to the logic 'L' state in a high speed. Thus, the output of a sense amplifier circuit 3 is provided with the high speed, and the access time is facilitated with the high speed. |
