| 摘要 |
PURPOSE:To improve the arithmetic processing speed of a whole system by making bit width small, and in addition, omitting arithmetic operation after a second time according to the contents of data. CONSTITUTION:As for 16-bit data inputted to a checking means, the check of whether all the bits of the 16-bit data are '0' or '1' for every source and every destination and the coincidence check of source data and destination data are executed, and a result is outputted to a signal line 106. A control means 9 determines the operation of the second time according to the result of this check and the kind of the arithmetic operation. In this case, the control means 9 determines whether the arithmetic operation of the second time is necessary or not by the checked result of the signal line 106 and the kind of the arithmetic operation of a first time. Then, in the case of addition, if all the bits of the source of high-order 16 bits checked at the time of the arithmetic operation of the first time are '0', and in addition, carry did not occur in the arithmetic operation of the first time, the arithmetic operation of the second time is omitted. Thus, the hardware of a data operating part is curtailed, and high-speed operation can be realized. |
