| 摘要 |
<p>A level conversion circuit includes a first pMOS transistor (35) having a source connected to a first power supply line, a gate receiving a first input signal, and a drain, and a second pMOS transistor (37) having a source connected to the first power supply line, a gate receiving a second input signal, and a drain. A first nMOS transistor (40) has a drain connected to a first output terminal and the drain of the first pMOS transistor, a gate, and a source. A first output signal is output via the first output terminal. A second nMOS transistor (41) has a drain connected to a second output terminal, the drain of the second pMOS transistor and the gate of the first nMOS transistor, a gate connected to the drain of the first nMOS transistor, and a source. A second output signal is output via the second output terminal. A control part (43-46) prevents a current from passing through the first pMOS transistor and the first nMOS transistor when both the first pMOS transistor and the first nMOS transistor are ON, and prevents a current from passing through the second pMOS transistor and the second nMOS transistor when both the second pMOS transistor and the second nMOS transistor are ON. <IMAGE></p> |
