发明名称 MULTI-MICROPROCESSOR SYSTEM
摘要 PURPOSE:To enable downstream data transfer at the same time and to shorten the data transfer time of a microprocessor by reading data out of a FIFO memory. CONSTITUTION:When one of microprocessor systems on a data link sends data, a microprocessor 101 stores the data in the FIFO memory 102 and also stores the data in a downstream data link 142 at the same time. The reception of the data is known from a reception signal 115 outputted from the FIFO memory 102 and the received data stored in the FIFO memory 102 is read out and then processed.
申请公布号 JPH04182854(A) 申请公布日期 1992.06.30
申请号 JP19900313614 申请日期 1990.11.19
申请人 NEC ENG LTD 发明人 MIWA TATSUYA
分类号 G06F15/16;G06F13/36;G06F15/167 主分类号 G06F15/16
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