发明名称 STAND-BY MEMORY SYSTEM
摘要 PURPOSE:To secure reliability and improve economy by automatically arranging a stand-by memory block in the address of a faulty memory block if one of plural memory blocks becomes faulty CONSTITUTION:A microprocessor block 1 and memory blocks 2-4, and the stand-by memory block 5 are connected by a system bus 6, and the memory blocks 2-4 and stand-by memory block 5 are further connected by a faulty block address bus 7. If trouble occurs to one of the memory blocks 2-4, the stand-by memory block 5 is arranged automatically in the address of the faulty memory block and operates as a substitute. Consequently, the reliability of the system is improved without decreasing the economy as compared with the complete doubling of the memory.
申请公布号 JPH04157547(A) 申请公布日期 1992.05.29
申请号 JP19900283886 申请日期 1990.10.22
申请人 NEC CORP 发明人 YOKOTA KEIICHI
分类号 G06F12/16 主分类号 G06F12/16
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