| 摘要 |
PURPOSE:To make long a hold time by a method wherein <75>As<+> ions and <31>P<+> ions are implanted in the surface of a silicon substrate via a cell contact hole through the silicon substrate and the lower electrode of a memory cell capacitor after an intermediate insulating film is formed and a double diffused layer consisting of an N<+> high-concentration diffused layer and an N<-> low-concentration diffused layer is formed only under the lower part of the contact hole. CONSTITUTION:A field oxide film 11 at an element isolation region and a gate oxide film 12 at an active region are formed on a P-type silicon semiconductor substrate 13. Then, a gate electrode 14 is formed on the film 12. An ion implantation for forming a double diffused layer is performed in a cell contact hole 19 on the conditions of <31>P<+>1 to 5X10<13> ions/cm<2> and 30 to 70keV or thereabouts and <75>As<+>1 to 9X10<15> ions/cm<2> and 30keV or thereabouts in self-alignment, whereby an N<+> high-concentration diffused layer 20 is formed. Then, an activation and a diffusion of the layer 20 are performed. Thereby, the magnitude <31>P<+> of the diffusion constant of <31>P<+> ions is large compared to the magnitude <75>As<+> of the diffusion constant of <75>As<+> ions, the <31>P<+> ions are diffused deep and an N<-> low-concentration diffused layer 21 out of the double diffused layer is formed. Then, a polysilicon film is made to apply in a CVD process. Then, a cell plate electrode 22 is formed. |
