发明名称 GENERATION METHOD OF LAND PATTERN DATA FOR WIRE BONDING
摘要 PURPOSE:To avoid the dispersion in the pattern quality by operators by a method wherein assuming respective four sides of an IC chip to be the bases, furthermore four right-angled isosceles triangles wherein respective vertexes turn toward the middle point of the IC chip are assumed and then the long direction of the land pattern data on the substrate side is automatically pointed to be turned toward the vertexes of the right-angled isosceles triangles. CONSTITUTION:Assuming respective four sides AB, BC, CD, DA of an IC chip to be bases, furthermore four right-angled isosceles triangles wherein the vertexes opposing to these four bases turn toward the middle point of the IC chip are assumed. Next, the long direction of the land pattern data 23 on the substrate side opposing to respective bonding pads juxtaposed along respective bases is automatically pointed to be turned toward the vertexes S, T, U, V opposing to the bases of the right-angled isosceles triangles. That is, the direction of the land pattern data 23 is standardized to be pointed at the directions of the four reference points S, T, U, V geometrically decided corresponding to respective four sides of IC chips. Through these procedures, the whole final layout can be geometrically decided thereby enabling the dispersion in the pattern quality and the miss connection by operators to be avoided.
申请公布号 JPH04139840(A) 申请公布日期 1992.05.13
申请号 JP19900264377 申请日期 1990.10.01
申请人 NEC CORP 发明人 EGAWA HIDENORI
分类号 H01L21/60;G06F17/50 主分类号 H01L21/60
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