发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To use a memory cell by setting the collector potential of the cell at a low level by providing a high-concentration N-type layer adjacent to a P-type base layer. CONSTITUTION:A high-concentration N-type layer 2 and low-concentration N-type layer 3 are formed on a P-type silicon substrate 1. A MOSFET is constituted by forming P-type layers 9 and 10 in the layer 3 separated by a field oxide film 4 and a gate electrode 5 in a gate oxide film. On the other hand, a bipolar transistor which uses the P-type layer 10 as a base and N-type layer 3 as a collector is formed by forming a high-concentration N-type emitter 11 in the layer 10. In addition, a high-concentration N-type layer 12 is formed adjacent to the layer 10. Therefore, the voltage of the bipolar transistor can be suppressed to a low level and desired collector potential can be obtained by controlling the surface concentration of the layer 12.
申请公布号 JPH04139878(A) 申请公布日期 1992.05.13
申请号 JP19900264333 申请日期 1990.10.01
申请人 NEC CORP 发明人 AOMURA KUNIO
分类号 H01L27/108;G11C11/405;H01L21/8242 主分类号 H01L27/108
代理机构 代理人
主权项
地址