| 摘要 |
<p>PURPOSE:To obtain a device which can make synchronization of clock and frame phase and pickup/separation of signaling information with a simple constitution, by using a specific circuit including an asynchronous memory circuit of reading out in sequence of write-in as a buffer circuit. CONSTITUTION:The output signal of a transmission code converting circuit 1, a reception PCM timing circuit 2, and a system timing circuit 4 makes the write-in/ readout control of a buffer circuit 3. As this buffer circuit 3, a circuit including an asynchronous memory circuit 309 of reading out in sequence of write-in, RAMs 310, 311 for signaling information arrangement and conversion, and multiframe counters 315, 316, is used. At the write-in of reception PCM signal to a memory circuit 309, a marker signal indicating the frame location and multiframe location is inserted and written in, a multiframe marker signal is picked up out of the output signals of the memory circuit 309, the counters 315, 316 are synchronized, and the write-in to the RAMs 310, 311 can be controlled with the instruction of the counters.</p> |
