发明名称 CLOCK DISTRIBUTING SYSTEM
摘要 PURPOSE:To remove the reflection of a signal due to non-connection by transmitting the connection state signal of a clock receiving unit to a clock generating part, and blocking the transmission of a clock to a non-connected slot by ON/ OFF-controlling the transmission of the clock to a clock transmitting part. CONSTITUTION:The clock receiving units 4-1 to 4-n are provided with plural slots 3-1 to 3-n to be connected, and a reference clock is transmitted to the clock receiving units from the clock generating distributing part through clock transmission lines 21-1 to 21-n. Each slot 3-1 to 3-n transmits the connection state signal showing the presence of the package of the clock receiving unit in its own slot to the clock generating part 1. The clock generating part 1 ON/OFF-controls the transmission of the clock to the clock transmission line on the basis of the connection state signal, and blocks the transmission of the clock to the non-connected slot 3-2. Thus, the reflection of the signal can be removed at the time when the high-speed clock signal is distributed to plural printed board units in a device.
申请公布号 JPH04115638(A) 申请公布日期 1992.04.16
申请号 JP19900231494 申请日期 1990.08.31
申请人 FUJITSU LTD 发明人 OUCHI NOBUAKI;MORIMOTO AKIO;NAKADE HIROSHI;SAITO FUMIHIKO;KANEKO HIROYUKI
分类号 G06F1/10;H04L7/00;H04L7/04 主分类号 G06F1/10
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