发明名称 ADDRESS GENERATING CIRCUIT
摘要 <p>PURPOSE:To improve the generation of an address capable of scanning two-dimensional array data in zigzags by detecting the position at the surrounding part on the two-dimensional array based on the address from an address generating means, and controlling the address generating means. CONSTITUTION:A clear signal is inputted from a terminal 111, and respective UD counters 101 and 102 are cleared to '0'. At this time, address signals outputted from terminals 103-108 are '00'. Also, an address value is inputted simultaneously through signal lines 140 - 145 to a block 120. Then, the address value is detected at first by the block 120 based on the inputted address informa tion. The elements which operate this detection are 121 - 126. The inputted address is '00' at present so that a CA = 0, and an RA=0 can be detected by respective elements 123 and 125, the output value is High, and the output values of the elements 124 and 126 are Low. The least significant bits of both addresses are coincident with each other by '0' so that the output value of the element 121 is Low, and the output value of the element 122 is High.</p>
申请公布号 JPH0486930(A) 申请公布日期 1992.03.19
申请号 JP19900201107 申请日期 1990.07.31
申请人 CANON INC 发明人 NAKAYAMA TADAYOSHI
分类号 G06F9/345;G06F12/02;G06T1/60;G11C8/00;G11C8/12 主分类号 G06F9/345
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