发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To simplify an input operation of address information by designating only the head one of the addresses which receive continuous accesses. CONSTITUTION:An input terminal 10 for address information is provided together with an address information decoder 15, a memory cell array 17 for storage of information, an input/output circuit 16 for memory information, a logical circuit which controls the input and output of memory information, and an address counter 31 which supplies the output signal of an address terminal 11 to the decoder 15 in the form of the set/reset signal. When the memory information is read out from and written to the cell 17 for continuous addresses, only the head address of the memory cell with which the reading or writing action is carried out is designated to perform the continuous reading/writing actions.
申请公布号 JPS59231791(A) 申请公布日期 1984.12.26
申请号 JP19830106082 申请日期 1983.06.14
申请人 SUWA SEIKOSHA KK 发明人 MIYAZAKI NOBUYUKI
分类号 G11C11/413;G11C8/00;G11C8/04;G11C11/34;G11C11/401;G11C11/408;G11C11/41;H01L27/10 主分类号 G11C11/413
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